VME extensions push imaging boards past gigabyte speeds

By continuing to improve performance, the VME bus platform remains prominent with gigabyte data handling.

By Andrew Wilson, Editor at Large

Medical and military high-performance requirements have spawned some of the most compute- and bandwidth-intensive image-processing applications in use today. Such applications demand the fastest available processors, intensely coupled over inter- and intraboard systems. And, for such applications, vendors must develop these multiprocessing high-performance systems in the smallest possible footprint so that embedded, real-time open systems can be installed in manned and unmanned aircraft or medical imaging systems.

In 1981, the VMEbus architecture was introduced to promote interoperability among the numerous boards available from a variety of vendors. Derived from Motorola's VERSAbus architecture, the 40-Mbye/s data-transfer protocol that originally defined the bus was based on the 68000 microprocessor. Nearly two decades later, the VMEbus is capable of transferring data at 528 Mbytes/s. Coupled with input/output (I/O) specifications that define data aggregate rates of greater than 1 Gbyte/s and the availability of fast CISC, MIMD, and SIMD processors, VME systems can now distribute and process data rapidly among large numbers of processors.

Expanded bandwidth

To attain the current possible data rate of 320 Mbyte/s, the VME standard has evolved through four extensions. "The first," says John Rynearson, technical director of the VMEbus International Trade Association (VITA; Scottsdale, AZ), "was to multiplex 32 bits of data onto address lines to achieve 64-bit data transfers during a VME bus block transfer. The addition of 64-bit transfers, as proposed in the VME64 specification, provided a 2X performance enhancement while thwarting the need for a new bus architecture."

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FIGURE 1. MaxVideo 250 VME image-processing boards from Datacube provide image-acquisition, storage, processing, and display functions on a single, one-slot VME card. Featuring 7000 MIPS of processing power, the boards support multiple, simultaneous image-processing pipelines that can be switched by software at frame rates.

In 1997, the VME64x specification doubled this data rate again by transferring data on both the rising and falling edges of the transfer signal. This new protocol was named two-edge VME (2eVME) and is specified in the VITA 1.1-1997 specification. That same year, at the Real Time Computer Show in Santa Clara, CA, Drew Berding, founder and president of Arizona Digital (Scottsdale, AZ), demonstrated a 21-slot VME backplane, known as VME320, that was capable of transferring data at 528 Mbyte/s. "Unlike conventional backplanes that are limited by transmission-line effects such as reflections, VME320 backplanes act as lumped capacitances. Therefore, the waveforms are smooth and monotonic, which allows a simple but extremely high-speed two-edge Source Synchronous Transfer (2eSST) protocol," says Berding.

Despite such advanced developments, products based on the latest VME specifications are not easy to find. Apart from Arizona Digital and General Micro Systems (Rancho Cucamonga, CA), no other companies are supporting VME320. Companies supporting the VME64x specification are equally difficult to find. Even though the standard was ratified more than three years ago, there are no VME products available that claim conformance to the standard.

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FIGURE 2. Incorporating the FPDP in the VT-5100, Valley Technologies' 6U VME-based vector processor uses the DSP-24 from DSP Architectures. With performance to 960 MOPS at a clock rate of 80 MHz, the processor focuses on DSP signal and image-processing applications.

A major reason for this lack of support has been the scarcity of VME interface ICs. Those that are available, such as the Universe II (CA91C142B) from Tundra Semiconductor (Kanata, Ontario, Canada) and the ALMA-V64 from IBM (Armonk, NY), are designed to interface a VME64 bus with a 32-bit PCI bus. And, despite conformance to the VME-64 specifications, boards built around the devices might not run at the full 80-Mbyte/s data bandwidth. In the design of its VMP6a PowerPC-based CPU, for example, Cetia (Burlington, MA) uses the Alma 64 PCI/VME bridge to transfer data across the VME64 interface at 70 Mbyte/s.

Bus challenges

Three factors seem to be hindering the adoption of the latest VME standards: the introduction of near 1-GHz processors on VMEbus and VME64 architectures, high-speed I/O buses, and the emergence of 64-bit, 66-MHz CPCI products capable of 528-Mbyte/s transfer rates.

In the 1980s, in what was to emerge as the Front Panel Data Port (FPDP) standard, Sky Computers (Chelmsford, MA) introduced its SKYburst protocol: a 32-bit parallel I/O port located on a VME system front panel that used a ribbon-cable connection to other boards to bypass the VME backplane. After the SKYburst was introduced, Interactive Circuits and Systems (ICS; Gloucester, Ontario, Canada) decided to support the standard in its ICS-140 ADC board. Subsequently, Mercury Computer Systems (Chelmsford, MA) released a similar concept called I/OTTL80.

At the same time, VME image-processing-board vendor Datacube (Danvers, MA) was developing a method of interchanging imaging data using a synchronous pipelined approach between arbitrary modules. In the design of the company's MAXbus, the VME-P2 connector was not used for transferring digital video data but was used instead for 32-bit VME and VMX data transfers. The MAXbus byte-wide video pipeline uses a 14-way ribbon cable to transfer 8 bits of data from one of two sources to up to ten receivers at 10 Mbyte/s. To increase this bandwidth, more interconnects can be added.

Today, Datacube still incorporates the MAXbus in its MAXvideo 250 and 200 series of VME image-processing boards. Providing image-acquisition, storage, processing, and display functions on a single, one-slot VME card, the MAXvideo 250 board packs 7000 MIPS of processing power and supports multiple, simultaneous pipelines that are switchable by software at frame rates (see Fig. 1).

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FIGURE 3. Featuring four TMS320C6701 DSPs that operate at 167 MHz, the model 4291 RACEway-compatible VME board from Pentek offers 4 GFLOPs of processing power. With a VME64 master/slave interface, the board comes equipped with 16 Mbytes of SDRAM and 2 Mbytes of global SRAM for sharing common data.

Including ports to the VMEbus and the MAXbus, the board is supplied with 28 Mbytes of memory and accepts analog or digital inputs from a range of sensors at various speeds and resolutions. "In high-performance machine-vision and image-processing system designs," says Shep Siegel, principal architect of the MAXbus, "MAXbus ports allow image data interchange with no performance penalty between the MAXvideo 250 and other VME boards, such as Datacube's XI display controller and MD1 digital image recorder."

In 1994, ICS decided to improve upon the work accomplished by Mercury Computer and Sky Computers by increasing the throughput of the FPDP to a sustained rate of 160 Mbyte/s. It also introduced positive-logic differential ECL drivers for the clock so that the FPDP could use cable lengths of more than 10 ft at the maximum clock frequency. The FPDP design also allowed cable busing across multiple boards so that data could be moved from one group of boards to another across a single flat cable. When ICS decided, in 1995, to seek standardization of FPDP through VITA, CSPI MultiComputer (Billerica, MA), Sky Computers, and Mercury Computer joined the VITA17 Task Group to draft the standard.

Today, the FPDP offers systems developers more than 20 VME boards for DSP, analog output, memory, and communication standards, such as STM and Fibre Channel. "Platform independent, the FPDP does not interfere with other data-flow architectures such as RACEway or SKYchannel that have since been standardized, " says Dipak Roy, president of ICS.

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FIGURE 4. For high-speed data recording, the DCR-1030 board from Myriad Logic supports the VME64, RACEway, SKYChannel, and FPDP interfaces. When interfaced to the Ampex line of digital cartridge recording systems and digital instrumentation systems, the board can support data transfer rates to 30 Mbyte/s.

Developers of high-performance DSP and image-processing boards are finding that their customers are increasingly demanding support of such interfaces as FPDP. To accomplish this, Valley Technologies (Tamaqua, PA), for example, has incorporated the interface in its VT-5100, a 6U VME-based vector processor based on the DSP-24 from DSP Architectures (Vancouver, WA). Offering a performance of up to 960 MOPS at a clock rate of 80 MHz, the VT-5100 has been developed for DSP signal- and image-processing applications (see Fig. 2).

Circuits and packets

Realizing several years ago that high-speed multiprocessing systems would require faster intra- and interboard communications, Mercury Computer and Sky Computers have both developed I/O specifications to dramatically increase the throughput of VME data. While Mercury's RACEway and RACE++ interconnects offer maximum data bandwidths of 160 and 267 Mbytes, respectively, the SKYchannel interconnect is capable of delivering 320 Mbytes/s. RACE++ provides for two data paths through a five-row VME connector for a total of 533 Mbytes.

Whereas the RACEway and RACE interconnects are circuit-switched designs, SKYchannel is based on a packet-switched data network. To implement its circuit-switched RACEway and RACE++ architectures, Mercury uses crossbar switches with six and eight I/O channels, respectively. Each channel is bidirectional but is driven in only one direction at a time at 160 or 267 Mbytes/s. To send data, a path is first established through the network by using a message header; then the message data are sent. After the last byte of data is sent down the pipeline, the channels become free and close up the path behind the message.

Backward-compatible with the original RACE architecture, the RACE++ architecture has been endorsed by more than 45 third-party vendors that provide more than 60 products. To increase computer power in RACEway systems, Pentek (Upper Saddle River, NJ) offers the model 4291 RACEway-compatible VME board. This board comes with four TMS320C6701 DSPs from Texas Instruments (Dallas, TX) that operate at 167 MHz to provide 4 GFLOPS (see Fig. 3). In addition to a VME64 master/slave interface, the board is equipped with 16 Mbytes of SDRAM and 2 Mbytes of global SRAM for sharing common data.

Adopted as an ANSI standard in 1997, the packet-switched SKYchannel crossbar backplane is a VME P2 overlay that can interconnect up to eight 6U or 9U SKYbolt II processor boards using a 10-ported SKYchannel crossbar switch. The two remaining crossbar ports can be connected into a SKYchannel extender, which allows SKYchannel crossbar backplanes to be daisy-chained together or interconnected through a SKYchannel chassis crossbar. With its 10 ports, the SKYchannel crossbar backplane can deliver five simultaneous 320-Mbyte/s SKYchannel data communication channels for an aggregate bandwidth of 1.6 Gbytes/s.

Other third-party vendors are also adopting the SKYchannel interface. For high-speed data recording, for example, the DCR-1030 board from Myriad Logic (Silver Spring, MD) supports the VME64, RACEway, SKYchannel, and FPDP interfaces (see Fig. 4). As an interface for the Ampex line of digital cartridge recording systems and digital instrumentation systems, this board can support sustained data transfers to Ampex 733 cartridge tapes (capable of storing 48 Gbytes per cartridge) at rates to 30 Mbyte/s.

Communication interfaces

Whereas RACEway and SKYchannel interconnects can transfer image data between and among multicomputers, they cannot link high-speed signal- and image-processing systems over large distances. To do so, system developers are turning to off-the-shelf VME boards for interfacing systems via high-speed networking protocols, such as Myrinet, Fibre Channel, High-Performance Parallel Interface (HIPPI), and Fiber Distributed Data Interface (FDDI).

Endorsed by CSPI as the I/O choice for its 2000 Series multicomputer boards, the Myrinet, developed by Myricom (Arcadia, CA), is a packet-switched gigabit/s communications interface that can transfer data among multicomputers. Unlike FDDI and Ethernet LANs, which have a fixed topology and share a fixed bandwidth among all clients, the aggregate bandwidth of Myrinet can be scaled with its configuration.

In the CSPI 2000 Series, all processors and I/O devices communicate with each other over Myrinet, whether on board, between boards, or between cabinets. The 2840 MultiComputer 6U VME form-factor board can deliver more than 14 GFLOPs using an eight-port crossbar switch to interconnect the on-board four processing nodes. Each node consists of a Myrinet interface processor, a PowerPC MPC7400 processor, and 64 Mbytes of SDRAM for signal- and image-processing applications.

In the race to deploy very-high-performance VME-based signal and image-processing systems, vendors are taking advantages of the bus's extended bandwidth. Better still, the already established high-speed I/O protocols, such as FPDP, SKYchannel, RACEway, and Myrinet, are allowing developers to integrate signal- and image-processing, I/O, and networking boards from several OEMs. And, although not VME standards, networking protocols such as Fibre Channel, HIPPI, and FDDI are allowing these same systems to transfer data between multicomputer systems over established networking protocols.