Vision DSP from Cadence enables embedded vision applications
April 5, 2016
The Tensilica Vision P5 digital signal processor (DSP) from Cadence Design Systems, Inc. was designed for embedded vision applications requiring ultra-high memory and operation parallelism to support complex vision processing at high resolution and high frame rates. The DSP is ideal for off-loading vision and imaging functions from the main CPU, including algorithms such as noise reduction, video stabilization, high dynamic range processing, object and face recognition, and more. Additionally, the DSP—which can be used in such applications as image enhancement, stereo and 3D imaging, depth map processing, robotic vision, face detection and authentication, augmented reality, and object tracking and avoidance—features 1024-bit memory interface with SuperGatherTM technology, and has a software environment that features support of standard OpenCV and OpenVX libraries for migration of existing imaging/vision applications with over 800 library functions.
To Learn More:
Contact: Cadence Design Systems, Inc.
Headquarters: San Jose, CA, USA
Product: Tensilica Vision P5 DSP
Key Features: 1024-bit memory interface with SuperGatherTM technology, up to 4 vector ALU operations per cycle (each with up to 64-way data parallelism), up to 5 instructions per issued cycle from 12-bit wide instruction.
What Cadence says:
View more information on the Tensilica Vision P5.
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Former VSD Editor James Carroll joined the team 2013. Carroll covered machine vision and imaging from numerous angles, including application stories, industry news, market updates, and new products. In addition to writing and editing articles, Carroll managed the Innovators Awards program and webcasts.