Sensor to Image offers a set of IP cores and a development framework to build FPGA-based products using the CoaXPress interface. Due to the speed of CXP, senders and receivers require a fast FPGA-based implementation of the CXP core, preferably using embedded transceivers. CXP cores are compatible with Xilinx 7 series devices (and higher)(1), Intel/Altera Cyclone V devices (and higher), Intel Cyclone Arria10(1) and Microchip Polarfire(1). (1): for CoaXPress-over-Fiber.